Currently digital data processors operate on very fast clocks and typically execute instructs faster than they can be recalled from generic memory. A known solution to the problem of providing instructions to the digital data processors is known as instruction cache. The digital data processing system provides a small, fast memory in physical and computational proximity to the data elements that require instruction control. This small, fast memory stores a subset of the instructions required. Digital data processors often work on loops. If all or most of an instruction loop is stored in the cache, the digital data processor can be kept fed with instructions at a rate faster than recall from generic memory.
As a result of these cache schemes it has become helpful to determine what instructions will be employed ahead of the actual need. Such a prefetch enables the cache anticipate the need for instructions. Prefetched instruction may already be stored in the cache when needed.
There are some problems with many prefetch techniques. In particular a demand fetch by the CPU may occur while a prefetch for the same instruction is pending.